.model cond_carry_adder
.inputs top^a0 top^a1 top^a2 top^a3 top^a4 top^a5 top^a6 top^a7 top^b0 top^b1 \
 top^b2 top^b3 top^b4 top^b5 top^b6 top^b7
.outputs top^c0 top^c1 top^c2 top^c3 top^c4 top^c5 top^c6 top^c7 top^s0 top^s1\
 top^s2 top^s3 top^s4 top^s5 top^s6 top^s7

.names gnd
.names unconn
.names vcc
1

.names top^a0 top^b0 top^BITWISE_XOR~0^LOGICAL_XOR~104
01 1
10 1

.names top^a0 top^b0 top^BITWISE_AND~2^LOGICAL_AND~119
11 1

.names top^BITWISE_XOR~4^LOGICAL_XOR~120 top^BITWISE_AND~2^LOGICAL_AND~119 top^BITWISE_XOR~5^LOGICAL_XOR~105
01 1
10 1

.names top^BITWISE_AND~2^LOGICAL_AND~119 top^MULTI_PORT_MUX~11^LOGICAL_NOT~12 top^BITWISE_OR~9^LOGICAL_OR~122 top^BITWISE_AND~7^LOGICAL_AND~121 top^MULTI_PORT_MUX~11^MUX_2~118
1-1- 1
-1-1 1

.names top^BITWISE_XOR~14^LOGICAL_XOR~123 top^MULTI_PORT_MUX~11^MUX_2~118 top^BITWISE_XOR~15^LOGICAL_XOR~106
01 1
10 1

.names top^MULTI_PORT_MUX~11^MUX_2~118 top^MULTI_PORT_MUX~21^LOGICAL_NOT~22 top^BITWISE_OR~19^LOGICAL_OR~127 top^BITWISE_AND~17^LOGICAL_AND~125 top^MULTI_PORT_MUX~21^MUX_2~108
1-1- 1
-1-1 1

.names top^BITWISE_XOR~24^LOGICAL_XOR~128 top^MULTI_PORT_MUX~21^MUX_2~108 top^BITWISE_XOR~25^LOGICAL_XOR~107
01 1
10 1

.names top^MULTI_PORT_MUX~11^MUX_2~118 top^MULTI_PORT_MUX~21^LOGICAL_NOT~22
0 1

.names top^MULTI_PORT_MUX~11^MUX_2~118 top^MULTI_PORT_MUX~37^LOGICAL_NOT~38 top^MULTI_PORT_MUX~31^MUX_2~126 top^MULTI_PORT_MUX~34^MUX_2~124 top^MULTI_PORT_MUX~37^MUX_2~117
1-1- 1
-1-1 1

.names top^BITWISE_XOR~40^LOGICAL_XOR~131 top^MULTI_PORT_MUX~37^MUX_2~117 top^BITWISE_XOR~41^LOGICAL_XOR~109
01 1
10 1

.names top^MULTI_PORT_MUX~37^MUX_2~117 top^MULTI_PORT_MUX~47^LOGICAL_NOT~48 top^BITWISE_OR~45^LOGICAL_OR~139 top^BITWISE_AND~43^LOGICAL_AND~135 top^MULTI_PORT_MUX~47^MUX_2~111
1-1- 1
-1-1 1

.names top^BITWISE_XOR~50^LOGICAL_XOR~140 top^MULTI_PORT_MUX~47^MUX_2~111 top^BITWISE_XOR~51^LOGICAL_XOR~110
01 1
10 1

.names top^MULTI_PORT_MUX~37^MUX_2~117 top^MULTI_PORT_MUX~47^LOGICAL_NOT~48
0 1

.names top^MULTI_PORT_MUX~37^MUX_2~117 top^MULTI_PORT_MUX~63^LOGICAL_NOT~64 top^MULTI_PORT_MUX~57^MUX_2~138 top^MULTI_PORT_MUX~60^MUX_2~134 top^MULTI_PORT_MUX~63^MUX_2~113
1-1- 1
-1-1 1

.names top^BITWISE_XOR~66^LOGICAL_XOR~143 top^MULTI_PORT_MUX~63^MUX_2~113 top^BITWISE_XOR~67^LOGICAL_XOR~112
01 1
10 1

.names top^MULTI_PORT_MUX~37^MUX_2~117 top^MULTI_PORT_MUX~63^LOGICAL_NOT~64
0 1

.names top^MULTI_PORT_MUX~37^MUX_2~117 top^MULTI_PORT_MUX~79^LOGICAL_NOT~80 top^MULTI_PORT_MUX~73^MUX_2~136 top^MULTI_PORT_MUX~76^MUX_2~132 top^MULTI_PORT_MUX~79^MUX_2~115
1-1- 1
-1-1 1

.names top^BITWISE_XOR~82^LOGICAL_XOR~148 top^MULTI_PORT_MUX~79^MUX_2~115 top^BITWISE_XOR~83^LOGICAL_XOR~114
01 1
10 1

.names top^MULTI_PORT_MUX~37^MUX_2~117 top^MULTI_PORT_MUX~79^LOGICAL_NOT~80
0 1

.names top^MULTI_PORT_MUX~37^MUX_2~117 top^MULTI_PORT_MUX~101^LOGICAL_NOT~102 top^MULTI_PORT_MUX~95^MUX_2~137 top^MULTI_PORT_MUX~98^MUX_2~133 top^MULTI_PORT_MUX~101^MUX_2~116
1-1- 1
-1-1 1

.names top^MULTI_PORT_MUX~37^MUX_2~117 top^MULTI_PORT_MUX~101^LOGICAL_NOT~102
0 1

.names top^MULTI_PORT_MUX~11^MUX_2~118 top^MULTI_PORT_MUX~37^LOGICAL_NOT~38
0 1

.names top^BITWISE_AND~2^LOGICAL_AND~119 top^MULTI_PORT_MUX~11^LOGICAL_NOT~12
0 1

.names top^a1 top^b1 top^BITWISE_XOR~4^LOGICAL_XOR~120
01 1
10 1

.names top^a1 top^b1 top^BITWISE_AND~7^LOGICAL_AND~121
11 1

.names top^a1 top^b1 top^BITWISE_OR~9^LOGICAL_OR~122
1- 1
-1 1

.names top^a2 top^b2 top^BITWISE_XOR~14^LOGICAL_XOR~123
01 1
10 1

.names top^a2 top^b2 top^BITWISE_AND~17^LOGICAL_AND~125
11 1

.names top^BITWISE_AND~17^LOGICAL_AND~125 top^MULTI_PORT_MUX~34^LOGICAL_NOT~35 top^BITWISE_OR~29^LOGICAL_OR~130 top^BITWISE_AND~27^LOGICAL_AND~129 top^MULTI_PORT_MUX~34^MUX_2~124
1-1- 1
-1-1 1

.names top^BITWISE_AND~17^LOGICAL_AND~125 top^MULTI_PORT_MUX~34^LOGICAL_NOT~35
0 1

.names top^a2 top^b2 top^BITWISE_OR~19^LOGICAL_OR~127
1- 1
-1 1

.names top^BITWISE_OR~19^LOGICAL_OR~127 top^MULTI_PORT_MUX~31^LOGICAL_NOT~32 top^BITWISE_OR~29^LOGICAL_OR~130 top^BITWISE_AND~27^LOGICAL_AND~129 top^MULTI_PORT_MUX~31^MUX_2~126
1-1- 1
-1-1 1

.names top^BITWISE_OR~19^LOGICAL_OR~127 top^MULTI_PORT_MUX~31^LOGICAL_NOT~32
0 1

.names top^a3 top^b3 top^BITWISE_XOR~24^LOGICAL_XOR~128
01 1
10 1

.names top^a3 top^b3 top^BITWISE_AND~27^LOGICAL_AND~129
11 1

.names top^a3 top^b3 top^BITWISE_OR~29^LOGICAL_OR~130
1- 1
-1 1

.names top^a4 top^b4 top^BITWISE_XOR~40^LOGICAL_XOR~131
01 1
10 1

.names top^a4 top^b4 top^BITWISE_AND~43^LOGICAL_AND~135
11 1

.names top^BITWISE_AND~43^LOGICAL_AND~135 top^MULTI_PORT_MUX~60^LOGICAL_NOT~61 top^BITWISE_OR~55^LOGICAL_OR~142 top^BITWISE_AND~53^LOGICAL_AND~141 top^MULTI_PORT_MUX~60^MUX_2~134
1-1- 1
-1-1 1

.names top^MULTI_PORT_MUX~60^MUX_2~134 top^MULTI_PORT_MUX~76^LOGICAL_NOT~77 top^BITWISE_OR~71^LOGICAL_OR~147 top^BITWISE_AND~69^LOGICAL_AND~145 top^MULTI_PORT_MUX~76^MUX_2~132
1-1- 1
-1-1 1

.names top^MULTI_PORT_MUX~60^MUX_2~134 top^MULTI_PORT_MUX~76^LOGICAL_NOT~77
0 1

.names top^MULTI_PORT_MUX~60^MUX_2~134 top^MULTI_PORT_MUX~98^LOGICAL_NOT~99 top^MULTI_PORT_MUX~89^MUX_2~146 top^MULTI_PORT_MUX~92^MUX_2~144 top^MULTI_PORT_MUX~98^MUX_2~133
1-1- 1
-1-1 1

.names top^MULTI_PORT_MUX~60^MUX_2~134 top^MULTI_PORT_MUX~98^LOGICAL_NOT~99
0 1

.names top^BITWISE_AND~43^LOGICAL_AND~135 top^MULTI_PORT_MUX~60^LOGICAL_NOT~61
0 1

.names top^a4 top^b4 top^BITWISE_OR~45^LOGICAL_OR~139
1- 1
-1 1

.names top^BITWISE_OR~45^LOGICAL_OR~139 top^MULTI_PORT_MUX~57^LOGICAL_NOT~58 top^BITWISE_OR~55^LOGICAL_OR~142 top^BITWISE_AND~53^LOGICAL_AND~141 top^MULTI_PORT_MUX~57^MUX_2~138
1-1- 1
-1-1 1

.names top^MULTI_PORT_MUX~57^MUX_2~138 top^MULTI_PORT_MUX~73^LOGICAL_NOT~74 top^BITWISE_OR~71^LOGICAL_OR~147 top^BITWISE_AND~69^LOGICAL_AND~145 top^MULTI_PORT_MUX~73^MUX_2~136
1-1- 1
-1-1 1

.names top^MULTI_PORT_MUX~57^MUX_2~138 top^MULTI_PORT_MUX~73^LOGICAL_NOT~74
0 1

.names top^MULTI_PORT_MUX~57^MUX_2~138 top^MULTI_PORT_MUX~95^LOGICAL_NOT~96 top^MULTI_PORT_MUX~89^MUX_2~146 top^MULTI_PORT_MUX~92^MUX_2~144 top^MULTI_PORT_MUX~95^MUX_2~137
1-1- 1
-1-1 1

.names top^MULTI_PORT_MUX~57^MUX_2~138 top^MULTI_PORT_MUX~95^LOGICAL_NOT~96
0 1

.names top^BITWISE_OR~45^LOGICAL_OR~139 top^MULTI_PORT_MUX~57^LOGICAL_NOT~58
0 1

.names top^a5 top^b5 top^BITWISE_XOR~50^LOGICAL_XOR~140
01 1
10 1

.names top^a5 top^b5 top^BITWISE_AND~53^LOGICAL_AND~141
11 1

.names top^a5 top^b5 top^BITWISE_OR~55^LOGICAL_OR~142
1- 1
-1 1

.names top^a6 top^b6 top^BITWISE_XOR~66^LOGICAL_XOR~143
01 1
10 1

.names top^a6 top^b6 top^BITWISE_AND~69^LOGICAL_AND~145
11 1

.names top^BITWISE_AND~69^LOGICAL_AND~145 top^MULTI_PORT_MUX~92^LOGICAL_NOT~93 top^BITWISE_OR~87^LOGICAL_OR~150 top^BITWISE_AND~85^LOGICAL_AND~149 top^MULTI_PORT_MUX~92^MUX_2~144
1-1- 1
-1-1 1

.names top^BITWISE_AND~69^LOGICAL_AND~145 top^MULTI_PORT_MUX~92^LOGICAL_NOT~93
0 1

.names top^a6 top^b6 top^BITWISE_OR~71^LOGICAL_OR~147
1- 1
-1 1

.names top^BITWISE_OR~71^LOGICAL_OR~147 top^MULTI_PORT_MUX~89^LOGICAL_NOT~90 top^BITWISE_OR~87^LOGICAL_OR~150 top^BITWISE_AND~85^LOGICAL_AND~149 top^MULTI_PORT_MUX~89^MUX_2~146
1-1- 1
-1-1 1

.names top^BITWISE_OR~71^LOGICAL_OR~147 top^MULTI_PORT_MUX~89^LOGICAL_NOT~90
0 1

.names top^a7 top^b7 top^BITWISE_XOR~82^LOGICAL_XOR~148
01 1
10 1

.names top^a7 top^b7 top^BITWISE_AND~85^LOGICAL_AND~149
11 1

.names top^a7 top^b7 top^BITWISE_OR~87^LOGICAL_OR~150
1- 1
-1 1

.names top^BITWISE_AND~2^LOGICAL_AND~119 top^c0
1 1

.names top^MULTI_PORT_MUX~11^MUX_2~118 top^c1
1 1

.names top^MULTI_PORT_MUX~21^MUX_2~108 top^c2
1 1

.names top^MULTI_PORT_MUX~37^MUX_2~117 top^c3
1 1

.names top^MULTI_PORT_MUX~47^MUX_2~111 top^c4
1 1

.names top^MULTI_PORT_MUX~63^MUX_2~113 top^c5
1 1

.names top^MULTI_PORT_MUX~79^MUX_2~115 top^c6
1 1

.names top^MULTI_PORT_MUX~101^MUX_2~116 top^c7
1 1

.names top^BITWISE_XOR~0^LOGICAL_XOR~104 top^s0
1 1

.names top^BITWISE_XOR~5^LOGICAL_XOR~105 top^s1
1 1

.names top^BITWISE_XOR~15^LOGICAL_XOR~106 top^s2
1 1

.names top^BITWISE_XOR~25^LOGICAL_XOR~107 top^s3
1 1

.names top^BITWISE_XOR~41^LOGICAL_XOR~109 top^s4
1 1

.names top^BITWISE_XOR~51^LOGICAL_XOR~110 top^s5
1 1

.names top^BITWISE_XOR~67^LOGICAL_XOR~112 top^s6
1 1

.names top^BITWISE_XOR~83^LOGICAL_XOR~114 top^s7
1 1

.end

