C01

C01: 3D Architecture Schemes and Processes
(M. Lemme, T. Mikolajick)

This project has a scientific and an organizational task which are both essential for the TRR. Scientifically, new contacting, wiring, local interconnection and integration schemes will be explored. An important aspect will be the research on novel atomic layer deposition and atomic layer etching processes that are not existing currently but will be required by projects in Research Area A. The non-programmable wiring schemes which will be strongly diverging from the state of the art in terms of materials and process integration, need to be in the focus of this project. The organizational task of the project is to connect the cleanroom infrastructures at three different sites and at least six different labs (RWTH Aachen cleanroom ZMNT, AMO, FZJ cleanroom, MPI-MSP, TUD cleanroom, NaMLab) is another important aspect and standardized sample formats, run-sheets, lithography marks etc. need to be defined and rolled out to the different labs in order to enable a seamless sample flow. For those important tasks of connecting the cleanrooms and streamlining the data exchange, which will also enhance the possibilities of researchers at the sites for further research activities, both universities TUD and RWTH Aachen confirmed to contribute one Postdoc position each to support Active-3D and to strengthen the collaborative work further. In the first phase of the TRR Project C01 will also closely follow the literature on heat distribution layers evaluate their necessity and the way forward. This could result in an own Research Area A project in Phase 2 or an important aspect of Phase 2 of the C01 project.

C02

C02: Hierarchical Device Simulation and Modeling
(C. Jungemann, S. Menzel)

In an early stage of the research, only small-scale demonstrations can be actually built in hardware.
It is therefore essential to simulate the whole technology stack starting from the device function via the circuit up to the system level to do a profound performance assessment which is required in many projects of Research Area B. This also includes the exploration and characterization of advantageous basic logic cells that Area B will use to implement complex circuits and systems. In Research Area A advanced simulation techniques will be required to optimize the new devices. Supplying such possibilities to the different projects is the central role of this essential overarching project. This project on hierarchical device modeling and simulation is extremely important since the available lab infrastructure does not allow to directly fabricate a full-blown demonstrator. At this early stage of the research, using state of the art semiconductor fabs would not only be prohibitive regarding many of the new materials, but would also not make sense in terms of a reasonable cost versus risk trade off. Therefore, simulations on all levels, starting from the device, via the circuit up to the system are essential to evaluate the system benefits of integrating a range of novel devices into the BEOL. Simulations and device models will be the link between the experimental device work and the system design work and therefore special efforts need to be taken here that make this task clearly an overarching topic.

C03

C03: Materials at Work – Characterization of Devices Under Operating Conditions
(R. Dittmann, B. Rellinghaus)

In most of the new devices researched in Research Area A and partially in Research Area B there are still uncertainties with respect to the precise device physics. The knowledge about the device physics is, however, indispensable for device optimization, assessing the possibilities and limitations on the circuit and system level and for developing simulation models. This project combines advanced in-operando methods to get new insights into the device operation. By this, enhanced device development and device modeling are enabled and a more precise system assessment will be possible (see Project C02). This project on materials at work provides advanced characterization techniques, with a focus on in-operando techniques, to support the device research but also the understanding of the physical mechanisms in the devices that are essential to extrapolate to more complex systems. With this setup, the broad know-how on novel devices and materials as well as circuit design and architecture available at RWTH Aachen and TUD will be combined to explore a novel 3D integration concept utilizing active devices fabricated in the BEOL for integrated circuits.