We would like to welcome Jiahong Bi to the CC Chair! Jiahong obtained his master’s degree on computer science from the TU Dresden in 2023 and his bachelor’s degree on engineering from eh Xidian University in China in 2019. Jiahong worked at the CC Chair as a student researcher, contributing for instance to the base2 MLIR dialect for custom representations, and in the context of his master thesis. In his thesis, entitled “A Lowering for High-Level Data Flows to Reconfigurable Hardware”, Jiahong worked on a novel dataflow MLIR dialect and a lowering path via high-level synthesis using the CIRCT project for FPGAs. He was supervised by Karl A. Friebel and Felix Suchert. With his expertise in high-level representations in compilers and tool-flows for heterogeneous systems, Jiahong will help our team in several projects that build around MLIR, most prominently on the MYRTUS EU Project. We are very happy to have Jiahong with us and are looking forward to working with him as PhD student.
The CC chair was present at the 29th Asia and South Pacific Design Automation Conference (ASP-DAC 2024), held in Incheon, South Korea during January 22 to 25, 2024. The conference targets emerging topics related to system design for embedded computing and Electronic Design Automation (EDA). At ASP-DAC 2024, Robert Khasanov presented his work on "Flexible Spatio-Temporal Energy-Efficient Runtime Management". This paper researches the impact of mapping decision models on performance and energy efficiency in (firm) real-time systems equipped with heterogeneous CPUs. It proposes offline and online algorithms that fully exploit the spatio-temporal scheduling solution space, a key factor for adaptive energy-efficient computing.
This year’s HiPEAC conference took place in January 17-19. As usual, it was great for the CC Chair to visit the conference, reinforce collaborations and kick-start new ones. The CC chair co-organized the workshop EVEREST + DAPHNE workshop, on design and programming high-performance, distributed, reconfigurable and heterogeneous platforms for extreme-scale analytics. The workshop included excellent talks from Stephen Neuendorffer (AMD) and Torsten Hoefler (ETH Zurich). Karl gave a talk on “MLIR stack for heterogeneous systems: Experiences and Results”, detailing the compiler work done by the CC Chair in the EVEREST project. Ciao Vieira, a visiting PhD student from Universidade Federal do Rio Grande do Sul, presented his work on “Hyperdimensional Computing Quantization with Thermometer Codes" in the co-located workshopAccelerated Machine Learning (AccML).
Prof. Castrillon gave an invited talk at the 8th International Workshop on Extreme Scale Programming Models and Middleware, co-located with this year’sInternational Conference on High Performance Computing, Networking, Storage and Analysis (SC’23) in Denver, USA. In his presentation, Prof. Castrillon talked about domain-specific programming methodologies for domain-specific and emerging computing systems. He presented examples from different projects at the CC Chair, including the EU H2020 EVEREST, the SPP2377, the 6G-life and the SCADS.AI projects, addressing the domains of big-data, physics simulations and machine learning, targeting modern reconfigurable hardware, for emerging memory technologies and for emerging in-memory computing.
On July 9 2023, Prof. Castrillon gave the keynote address at the 2nd In-Memory Architectures and Computing Applications Workshop (iMACAW’23), co-located with the Design Automation Conference (DAC’23) in San Francisco, USA. In the keynote, Prof. Castrillon talked about “Programming abstractions for in and near-memory computing” where he talked about recent work on programming frameworks and compilers in the context of the SCADS.AI center, the SPP 2377 Disruptive Memory Technologies, the EVEREST EU Project and other projects at the CC Chair. The talk was well attended and was followed by lively panel with Prof. Onur Mutlu and Prof. Damien Querlioz. Big thanks to the event organizers Nima Taherinejad (TU Wien), Alberto Bosio (École Central de Lyon) and Deliang Fan (Arizona State University).
Asif A. Khan was awarded the “3m5 Excellence Award – herausragende Dissertation” for his thesis “Design and Code Optimization for Systems with Next-generation Racetrack Memories”. Racetrack memories (RTMs) are an emerging type of memory with the potential to revolutionize computing systems by virtually removing the memory wall. Asif’s thesis contains a collection of outstanding innovative ideas, methods and tools to optimize systems with racetrack memories. His work on emerging memories, computer architectures and compilers has led to above 25 publications and several 3rd party-funded projects. Asif joined the CC Chair in 2017 and continues to work with us in his new role as Postdoc. The award was handed during this year's OUTPUT.DD science event. We are happy for Asif, congratulations! Photo credits: (c) 3m5.