Michael Raitza

E-mail

Phone

Fax

Visitor's Address

michael.raitza (-) tu-dresden.de

+49 (351) 463-43527

+49 (0)351 463-39995

Helmholtzstrasse 18, BAR-III75

Michael Raitza works on reconfigurable FET device and circuit characterisation. He investigates ways to extend the current EDA toolstack to make use of the unique properties and the larger variety that come with RFET circuits in order to improve circuit design.

Publications

  • 2023

  • 15. Steffen Märcker, Michael Raitza, Shubham Rai, Giulio Galderisi, Thomas Mikolajick, Jens Trommer, Akash Kumar, "Formal Analysis of Camouflaged Reconfigurable Circuits" (to appear), Proceedings 21st International NEWCAS Conference, pp. 1–4, 2023. [Bibtex & Downloads]

  • 2022

  • 14. Michael Raitza, Steffen Märcker, Shubham Rai, Akash Kumar, "Exploring Standard-Cell Designs for Reconfigurable Nanotechnologies: A Formal Approach", In Proceeding: 2022 Design, Automation Test in Europe Conference Exhibition (DATE), Mar 2022. [Bibtex & Downloads]
  • 13. Shubham Rai, Nishant Gupta, Abhiroop Bhattacharjee, Ansh Rupani, Michael Raitza, Jens Trommer, Thomas Mikolajick, Akash Kumar, "END-TRUE: Emerging Nanotechnology-Based Double-Throughput True Random Number Generator" (to appear), Chapter in VLSI-SoC: Technology Advancement on SoC Design, Springer Nature Switzerland, pp. 175–203, 2022. [doi] [Bibtex & Downloads]

  • 2020

  • 10. M. Raitza, S. Märcker, J. Trommer, A. Heinzig, S. Klüppelholz, C. Baier, A. Kumar, "Quantitative Characterization of Reconfigurable Transistor Logic Gates", In IEEE Access, pp. 1-1, June 2020. [Bibtex & Downloads]
  • 9. Shubham Rai, Michael Raitza, Siva Satyendra Sahoo, Akash Kumar, "DiSCERN: Distilling Standard-Cells for Emerging Reconfigurable Nanotechnologies", In Proceeding: 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), IEEE, Mar 2020. [doi] [Bibtex & Downloads]

  • 2019

  • 8. Shubham Rai, Jens Trommer, Michael Raitza, Thomas Mikolajick, Walter M. Weber, Akash Kumar, "Designing Efficient Circuits Based on Runtime-Reconfigurable Field-Effect Transistors", In IEEE Transactions on Very Large Scale Integration (VLSI) Systems, Institute of Electrical and Electronics Engineers (IEEE), vol. 27, no. 3, pp. 560–572, Mar 2019. [doi] [Bibtex & Downloads]

  • 2018

  • 7. Jeronimo Castrillon, Matthias Lieber, Sascha Klüppelholz, Marcus Völp, Nils Asmussen, Uwe Assmann, Franz Baader, Christel Baier, Gerhard Fettweis, Jochen Fröhlich, Andrés Goens, Sebastian Haas, Dirk Habich, Hermann Härtig, Mattis Hasler, Immo Huismann, Tomas Karnagel, Sven Karol, Akash Kumar, Wolfgang Lehner, Linda Leuschner, Siqi Ling, Steffen Märcker, Christian Menard, Johannes Mey, Wolfgang Nagel, Benedikt Nöthen, Rafael Peñaloza, Michael Raitza, Jörg Stiller, Annett Ungethüm, Axel Voigt, Sascha Wunderlich, "A Hardware/Software Stack for Heterogeneous Systems", In IEEE Transactions on Multi-Scale Computing Systems, vol. 4, no. 3, pp. 243-259, Jul 2018. [doi] [Bibtex & Downloads]
  • 6. Shubham Rai, Michael Raitza, Akash Kumar, "Technology mapping flow for emerging reconfigurable silicon nanowire transistors", In Proceeding: 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), IEEE, Mar 2018. [doi] [Bibtex & Downloads]
  • 5. Shubham Rai, Ansh Rupani, Dennis Walter, Michael Raitza, Andre Heinzig, Tim Baldauf, Jens Trommer, Christian Mayr, Walter M. Weber, Akash Kumar, "A physical synthesis flow for early technology evaluation of silicon nanowire based reconfigurable FETs", In Proceeding: 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE), IEEE, Mar 2018. [doi] [Bibtex & Downloads]

  • 2017

  • 4. Michael Raitza, Jens Trommer, Akash Kumar, Marcus Völp, Dennis Walter, Walter Weber, Thomas Mikolajick, "Exploiting Transistor-Level Reconfiguration to Optimize Combinational Circuits", Proceedings of the 2017 Design, Automation & Test in Europe Conference & Exhibition, March 2017. [Bibtex & Downloads]

  • 2016

  • 3. Marcus Völp, Sascha Klüppelholz, Jeronimo Castrillon, Hermann Härtig, Nils Asmussen, Uwe Assmann, Franz Baader, Christel Baier, Gerhard Fettweis, Jochen Fröhlich, Andres Goens, Sebastian Haas, Dirk Habich, Mattis Hasler, Immo Huismann, Tomas Karnagel, Sven Karol, Wolfgang Lehner, Linda Leuschner, Matthias Lieber, Siqi Ling, Steffen Märcker, Johannes Mey, Wolfgang Nagel, Benedikt Nöthen, Rafael Peñaloza, Michael Raitza, Jörg Stiller, Annett Ungethüm, Axel Voigt, "The Orchestration Stack: The Impossible Task of Designing Software for Unknown Future Post-CMOS Hardware", Proceedings of the 1st International Workshop on Post-Moore's Era Supercomputing (PMES), Co-located with The International Conference for High Performance Computing, Networking, Storage and Analysis (SC16), Salt Lake City, USA, Nov 2016. [Bibtex & Downloads]
  • 2. Jens Trommer, Tim Baldauf, Thomas Mikolajick, Walter M Weber, Michael Raitza, others, "Reconfigurable nanowire transistors with multiple independent gates for efficient and programmable combinational circuits", In Proceeding: 2016 Design, Automation & Test in Europe Conference & Exhibition (DATE), pp. 169–174, 2016. [Bibtex & Downloads]

  • 2015

  • 1. Michael Raitza, Markus Vogt, Christian Hochberger, Thilo Pionteck, "RAW 2014: Random Number Generators on FPGAs", In ACM Trans. Reconfigurable Technol. Syst., ACM, vol. 9, no. 2, pp. 15:1–15:21, New York, NY, USA, Dec 2015. [doi] [Bibtex & Downloads]